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About the Role
Join a semiconductor startup developing thermodynamic computing chips. In this senior role, you will design analog and mixed-signal circuits across multiple chip programs, helping take new computing architectures from concept through silicon.
What You'll Do
Design circuit blocks such as ADCs, PLLs, bandgap references, regulators, oscillators, high-speed dividers, and serializer/deserializers.
Own block-level work across architecture, schematic design, layout, and tape-out verification, including DRC, ERC, and LVS.
Perform hands-on layout and simulations in Cadence, including PEX, Monte Carlo, and corner analysis.
Support laboratory testing and validation using signal generators, spectrum analyzers, and oscilloscopes.
Collaborate with IC, systems, physics, and algorithms teams to develop mixed-signal computing circuits.
What We're Looking For
Three to six years of CMOS analog and mixed-signal IC design experience, with an MS or PhD in Electrical Engineering focused on the field.
Experience designing at least one of the following: ADCs, PLLs, oscillators, regulators, or high-speed SerDes.
Multiple tape-outs, ideally using FinFET or 28 nm or 65 nm processes.
Working knowledge of Cadence Virtuoso, PEX, Monte Carlo and corner analysis, and familiarity with Python or C.
Ability to analyze small-signal and feedback behavior, including closed-loop gain, loading effects, and Miller effects.
Broad circuit experience, hands-on layout skills, and willingness to contribute beyond a narrow area of specialization.
Compensation & Benefits
Base salary range: $160,000 to $300,000 annually. Visa sponsorship is available.
Location
Hybrid, with three days per week on-site in Boston, Massachusetts, United States.
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