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ASIC Design Engineer – DSP / Analog / SerDes

Celero Communications, Inc.
Posted 6 months ago, valid for 10 days
Location

Irvine, CA, US

Salary

$150,000 - $250,000 per year

Contract type

Full Time

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Sonic Summary

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  • Celero Communication Inc. is a fast-growing start-up in the semiconductor industry seeking skilled ASIC Design Engineers to develop optical transceivers for advanced AI and data center infrastructure.
  • The ideal candidate should have a Bachelor’s or higher degree in Electrical Engineering or a related field and at least 3 years of experience in digital design and verification.
  • Key responsibilities include designing digital circuits using HDL, performing timing analysis, and collaborating with cross-functional teams for system integration.
  • Candidates should be proficient in HDLs like Verilog or System Verilog and have a strong understanding of digital design principles and methodologies.
  • The salary range for this position is between $150,000 and $250,000 annually, depending on skills, experience, qualifications, and location.

About the Role:

Celero Communication Inc. is an exciting and fast-growing start-up in the semiconductor industry, pushing boundaries with innovative technologies that power the world’s most advanced AI and data center infrastructure. 

Celero is seeking skilled and motivated ASIC Design Engineers to join our team and contribute to the development of optical transceivers for next-generation optical modems. The ideal candidate will play a crucial role in designing and developing ASICs for cutting-edge technologies.

Locations Available: Irvine, CA HQ, San Jose, CA, Austin, TX, Ottawa Ontario, CN, & Vancouver

Key Responsibilities:

  • Design and implement digital circuits using HDL (Verilog/ System Verilog).
  • Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis
  • Optimize designs for performance, power, and area (PPA) requirements.
  • Perform RTL simulation and verification to ensure design functionality.
  • Participate in design reviews and provide technical guidance to team members.
  • Collaborate with cross-functional teams on system integration and validation.

Qualifications:

  • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.
  • 3+ years of experience in digital design and verification.
  • Proficiency in HDLs such as Verilog, or System Verilog.
  • Strong understanding of digital design principles and methodologies.
  • Familiarity with ASIC design flow, and experience with ASIC design tools.
  • Knowledge of low-power design techniques.
  • Familiarity with verification methodologies (e.g., UVM, formal verification).
  • Excellent problem-solving, strong communication and teamwork skills.

Preferred Skills

  • Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.
  • Experience with scripting languages (e.g., Python, Tcl).
  • Understanding of Optical Communication Standards is a plus.
  • Ability to multitask and adapt to a fast-paced, dynamic environment.

Salary Range

$150,000 - $250,000 Base Annually 
The final offer will be determined based on job-related skills, experience, qualifications, and location.

 




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By applying, a Celero Communications, Inc. account will be created for you. Celero Communications, Inc.'s Privacy Policy and Terms & Conditions will apply.

SonicJobs' Terms & Conditions and Privacy Policy also apply.