R&D Engineer

Sapsol Technologies Inc

Posted 24 days ago, valid for 13 days

Mountain View, CA, US

Competitive

Full Time

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Sonic Summary

The job requires a candidate to validate and sanity check existing FPGA prototyping designs on hardware.
The role involves migrating and optimizing these designs to all Synopsys hardware platforms.
Candidates must create and edit user documents and conduct hardware experiments in the lab, including maintaining setups and equipment.
The position demands establishing personal timetables according to task assignments and supporting project goals of other engineers.
A minimum of 5 years of experience is required for this role, with a competitive salary of $100,000 per year.

Responsible for

Validate and sanity check existing FPGA protoyping design on hardware.

Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.

Create and edit user documents

Work in the lab to conduct hardware experiment including maintaining setups and equipment

Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.