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Development Verification Engineer

Ernest Gordon Recruitment Limited
Posted a day ago, valid for a month
Location

Bristol, City of Bristol BS1 6WS, England

Salary

£55,000 - £65,000 per annum

Contract type

Full Time

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Sonic Summary

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  • The position is for a Development Verification Engineer with a salary range of £55,000 to £65,000, plus a 10% bonus and training opportunities.
  • The role is based in Bristol with a hybrid work model, allowing two days of remote work per week.
  • Candidates should have experience in SystemVerilog and UVM verification methods, as well as a degree in a technical field such as Electrical Engineering or Computing.
  • The engineer will be responsible for developing and maintaining SystemVerilog UVM test benches and creating new verification components.
  • This opportunity offers career progression and the chance to contribute to a leading semiconductor company serving the automotive and industrial sectors.

Development Verification Engineer

55,000 - 65,000 + Training + Progression + 10% Bonus

Bristol - Hybrid

Are you a Development Verification Engineer or similar with expertise in SystemVerilog and UVM, seeking an autonomous role where your work directly contributes to the success of a leading semiconductor company, with opportunities for career growth, ongoing development, and the potential to increase your earnings through a 10% company bonus?

This leading semiconductor and microcontroller provider supplies innovative solutions into the automotive and industrial sectors worldwide. With a turnover in the billions and a strong global presence, they support clients in driving efficiency, safety, and sustainability across critical industries.

In this role, you will develop and maintain SystemVerilog, UVM test benches, create new verification components, debug test cases, define functional coverage models, while supporting test bench architecture and design reviews using industry standard EDA tools. This is a full-time role, Monday to Friday, 09:00AM - 17:00PM, with two days per week working from home.

This role would suit a Development Verification Engineer with SystemVerilog and UVM skills, looking to join a world-leading semiconductor company with clear progression, specialist training, and the opportunity to boost earnings through a company bonus.

The Role:

  • Take the lead in creating and integrating new SV UVM verification components
  • Develop and maintain SystemVerilog - UVM test benches
  • Monday to Friday, 09:00AM - 17:00PM with two days per week working from home.

The Person:

  • Degree in a technical field such as Electrical/Electronic Engineering, Mathematics, Physics, Computing, or Robotics
  • Experienced in SystemVerilog and UVM verification methods
  • Experienced in using EDA tools

Reference: BBBH21987

Keywords: SVUVM, UVM, SV UVM, Specman-e, Functional Coverage, Testbench Development, Debugging, EDA Tools, Python, Scripting, IP Verification, Bristol, Hybrid

If you're interested in this role, click 'apply now' to forward an up-to-date copy of your CV.

We are an equal opportunities employer and welcome applications from all suitable candidates. The salary advertised is a guideline for this position.

The offered renumeration will be dependent on the extent of your experience, qualifications, and skill set. Ernest Gordon Recruitment Limited acts as an employment agency for permanent recruitment and employment business for the supply of temporary workers. By applying for this job, you accept the T&C's, Privacy Policy and Disclaimers which can be found at our website.

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By applying, a CV-Library account will be created for you. CV-Library's Terms & Conditions and Privacy Policy will apply.

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