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Senior FPGA Engineer

Cordius
Posted a month ago, valid for 10 days
Location

Derby, Derbyshire DE12FU, England

Salary

£50,000 - £75,000 per annum

Contract type

Full Time

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Sonic Summary

info
  • Salary: Not specified
  • Experience required: 5+ years in FPGA design
  • Responsibilities include FPGA system architecting, requirements capture, design and development of FPGA solutions, defining interfaces, and design testing procedures
  • Essential skills needed are extensive experience with VHDL, familiarity with current FPGA technologies, proficiency in TCL scripting, experience with Modelsim/Questa, and familiarity with Quartus tool chain
  • Desirable skills include experience with Vivado, Libero, and Quartus tool chains, knowledge of System Verilog/Verilog or VHDL 2008, familiarity with UVM or ABV for design validation, and deep knowledge of Network Layer 2 and Layer 3 protocols

Fluent in all aspects of FPGA design for high assurance systems, you will be responsible for the FPGA development for new and innovating products and report to the Head of FPGA development

Due to security requirements, to be considered, you must be a UK National (not Dual-National) and be able to gain/hold a high-level security clearance (DV).

Responsibilities and Duties:

  • FPGA System architecting for new products
  • Requirements capture for new products
  • Design and development of FPGA solutions
  • Defining and coordinating interfaces for both internal and external components
  • Design testing procedures for complete design validation
  • Development of new Test-bench modules to ensure correct operation
  • Identify problems and implement solutions
  • Keeping up to date with the latest FPGA technologies and design tools

Essential Skills:

  • Extensive experience of VHDL for FPGA development
  • Familiarity with all current FPGA and SoC technologies
  • Proficient with the use of TCL scripting
  • Extensive experience with Modelsim/Questa
  • Experience with Quartus tool chain
  • Good written and oral communications skill

Desirable Skills:

  • Experience of Vivado, Libero and Quartus tool chains
  • Knowledge of System Verilog / Verilog or VHDL 2008
  • Familiar with the use of Universal Verification Methodology (UVM) or Assertion Based Verification (ABV) for design validation
  • Deep knowledge of Network Layer 2 and Layer 3 protocols

Person Specification:

  • You will ideally have a relevant STEM degree along and have worked 5+ years in FPGA design
  • Competitive benefits package including pension, and flexible working hours
  • Training and development opportunities
  • Must be a UK National (not Dual-National) and be able to hold a high-level security clearance (DV)

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