This is a system-level valida5on role within the Mac and Data Center Hardware organiza5on, focused on SerDes I/O valida5on across mul5ple plaEorms. You will be responsible for seIng up and execu5ng high-speed I/O valida5on, driving electrical compliance bring-ups, and stress- tes5ng I/Os in system environments while collec5ng and analyzing key metrics. The role also includes high-speed valida5on and electrical compliance tes5ng of I/Os for form-factor systems, as well as valida5on of high-speed cables and fixtures. You will work closely with cross-func5onal teams including system signal integrity, silicon design, and system design to ensure robust and reliable I/O performance. If you have hands-on high-speed lab experience and are eager to grow your exper5se in system-level signal integrity valida5on, we'd love to hear from you!

Description

In this role you will: Execute high-speed serial I/O valida5on across mul5ple plaEorms. Conduct high-speed electrical compliance tes5ng and organize compliance data reports for comparison against specifica5ons and approval by cer5fica5on organiza5ons. Troubleshoot and triage issues with compliance test hardware, fixtures, soPware, and the Device Under Test (DUT). Perform failure analysis and provide feedback to support itera5ve hardware design and soPware tunable improvements. Define and develop stress tes5ng methodologies to iden5fy design opera5ng limits of serial I/Os post system integra5on. Validate high-speed fixtures, connectors, cables, and plaEorm I/Os. Develop Python-based scripts to automate data collec5on and accelerate valida5on workflows.

Minimum Qualifications

M.S. Degree or B.S. Degree with industry level lab work experience. Familiarity with diﬀerent aspects of Signal Integrity for high-speed SerDes, parallel bus, and single-ended signaling. Understanding of high-speed channel characteris5cs including inser5on loss, return loss, crosstalk, and impedance discon5nui5es. Hands-on experience with high-speed SerDes valida5on such as for PCIe, DP, or USB4/TBT. Hands-on experience and familiarity with lab high-speed equipment including oscilloscopes, BERTs, TDR, and VNA/PNA, including calibra5on methods.

Preferred Qualifications

M.S. Degree with 3+ years of relevant work experience. Ability to understand and review channel analysis from Signal Integrity EDA tools. Deep knowledge of system-level SerDes design and analysis skills, including understanding of transmi`er and receiver equaliza5on methods (such as FFE, CTLE, DFE, VGA gain), CDR behaviors, link training algorithms, and eye margining tools.

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System High-Speed I/O Valida5on Engineer

Description

Minimum Qualifications

Preferred Qualifications