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Description
In this highly visible role, you will support the integration of 3rd party IP in the SOCs developed by Apple. Your job is to verify that the IP deliverables are meeting Apple's high quality standards and get flawlessly integrated. The role involves working closely with different cross-functional teams within Apple as well as with external vendors. Occasional travel might be required.
Minimum Qualifications
BSEE/MSEE and 7+ years industry related experience.
Preferred Qualifications
Experience with Verilog modeling and model validation is a plus Experience with standards like PCI Express, MIPI, USB or DisplayPort is a plus Excellent written and verbal communication skills Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines Experience in RTL design, verification or integration Deep knowledge and experience with front-end tools such as simulation, synthesis, lint, logic equivalence, static timing analysis, CDC, RDC, and UPF Familiarity with SOC design flow and verification methodologies Good understanding of DFT requirements for SOCs Experience writing Verilog, SystemVerilog, SVA hardware description languages
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