Back to search
Description
Design and Development: Design and implementation of complex ASICs. Develop RTL using SystemVerilog and perform synthesis. Verification: Engage with simulation-based and formal verification teams to ensure robust design validation. Integration and Testing: Collaborate with hardware and software teams to integrate digital designs into complex SoCs. Timing and Power Analysis: Conduct timing analysis and power optimization to achieve PPA goals. Documentation and Reporting: Create detailed micro-architecture and design documentation.
Minimum Qualifications
Minimum of BS +0 years relevant industry experience
Preferred Qualifications
Experience: Coursework in ASIC design including RTL design and verification. Hands-on experience with ASIC design tools and methodologies is essential. Technical Skills: SystemVerilog, RTL design and synthesis. Problem-Solving: Strong analytical and problem-solving skills. Collaboration: Excellent communication and teamwork skills, work effectively in cross-functional teams. Knowledge in CDC and RDC is a plus
Learn more about this Employer on their Career Site
