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Design Verification Engineer

Apple
Posted 2 months ago, valid for 9 days
Location

Beaverton, OR 97076, US

Salary

Competitive

Contract type

Full Time

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Sonic Summary

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  • Apple is seeking Design Verification Engineers to verify the functionality and performance of its premier SOCs.
  • The position requires a minimum of a BS degree with 0 years of relevant industry experience.
  • Candidates should have knowledge of computer architecture, digital design fundamentals, and familiarity with Verilog or SystemVerilog.
  • Experience with scripting languages like Python or Perl is preferred, along with excellent interpersonal skills.
  • This role offers an exciting opportunity to contribute to innovative technology products and services at Apple.
Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love to have you join us

Description


As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all teams (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.

Minimum Qualifications


Minimum of BS + 0 years relevant industry experience.

Preferred Qualifications


Knowledge of computer architecture and digital design fundamentals Knowledge of Verilog or SystemVerilog, digital simulation and debug Experience with Python, Perl, or similar scripting language Ability to work independently to deliver the project goals Experience with C/C++, assembly is a plus. Excellent interpersonal skills and the dream to take on diverse challenges



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