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Performance Modeling Software Architect, Platform Architecture

Apple
Posted 4 months ago, valid for 13 days
Location

Beaverton, OR 97076, US

Salary

Competitive

Contract type

Full Time

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Sonic Summary

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  • Apple is seeking a SOC Performance Modeling SW Architect to join their Hardware Technologies organization, focusing on the architecture of future devices.
  • Candidates should have a Bachelor's degree and experience in hardware architecture, with proficiency in C++ and Python, as well as knowledge of data structures and algorithms.
  • The role involves collaborating with engineers to develop performance models, ensuring high-quality data for hardware designs, and maintaining the simulator's performance and flexibility.
  • Preferred qualifications include an MS or PhD in a related field and 20+ years of relevant experience in software development and performance modeling.
  • Salary details were not provided in the job description.
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Join us to help deliver the next groundbreaking Apple product. In this role, you will be a member of the system-on-chip (SOC) performance team, working within the Hardware Technologies organization to shape the architecture of Apple's future devices. Our team initiates and fosters deep collaboration between the SOC architecture, design, power, and software teams, to deliver world-class caches/memory system. The end goal is to provide the best customer experience in the world by enabling all the CPUs, GPUs, Machine Learning, Camera, Display, and Connectivity components on our chips to work seamlessly together. We are seeking an upbeat and highly motivated SOC Performance Modeling SW Architect to work on our performance models and infrastructure.

Description


You will be tasked with ensuring Apple's ability to produce high quality, timely data to drive world class hardware designs. You will collaborate with engineers across the organization to translate design space studies into well written software models. You will develop your ability to transform the hardware execution model into high-performance C++. You will be involved with the full life-cycle of performance modeling, from early architectural exploration to post-silicon correlation. Last, but not least, you'll be expected to pay close attention to the performance, maintainability, and flexibility of the simulator, making sure hardware architects can quickly iterate on experiments.

Minimum Qualifications


Bachelor's degree Experience in hardware architecture and design issues Experience coding in C++ and Python and binding C++ to other languages Experience with computer architecture and software engineering principles Experience with data structures and algorithms Experience using software models to collect behavioral characteristics, and transforming that data into compelling performance analysis

Preferred Qualifications


MS or PhD in CS, EE or related field 20+ years of relevant experience Experience with multi-paradigm software development in C++ Experience with multi-language programming environments, and selecting the right tool or language for the job Experience with compiler explorer and understanding the transformations the compiler is performing on your code Experience thinking about code as something that will be read by both humans and machines, and instituting conventions, structure, and documentation that make a codebase tractable for AI-assisted reasoning and navigation Experience with architectural, micro-architectural performance modeling



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