Responsibilities
- Lead the transition of products from design to high-volume manufacturing (HVM). Collaborate with design teams to ensure Design for Test (DFT) and Design for Manufacturing (DFM) requirements are met
- Monitor and analyze wafer sort and final test data. Use statistical methods (Gage R&R, SPC) to identify root causes of yield loss and implement corrective actions
- Collaborate with system design, packaging, and process teams to resolve integration, reliability, and performance challenges in early-stage prototypes and production systems
- Create and perform DoEs to uncover device issues' root cause, propose remedy, get alignment from cross functional partners, and execute to their implementation
- Collaborate with Test Engineering to optimize test programs and test methods to reduce test time without compromising quality or coverage
- Drive the validation of key performance indicators of integrated display solutions under nominal and corner-case operating conditions
- Perform analysis electrical characterization across process corners, voltage, and temperature (PVT) to define datasheet specifications
- Define and execute reliability and qualification test plans for new display technologies in accordance with relevant industry standards and technology requirements
- Drive root cause investigation of internal and customer returns. Interface with the failure analysis lab to interpret SEM, EDX, or EMMI results
- Manage technical relationships with OSAT (Out-Sourced Assembly and Test), CM (Contract Manufacturing), and foundries to ensure manufacturing consistency
- Define and create data pipelines and dashboards for commonly referenced metrics and KPIs
- facilitate the democratization of data to cross functional teams
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Materials Science, Physics, or equivalent experience
- 8+ years of experience in semiconductor test engineering, product engineering, reliability/qualification (REL / QUAL), process engineering, or advanced integration and packaging
- Experience with analog and digital circuit test development and optical/electrical measurement techniques
- Experience with reliability and qualification standards relevant to displays and semiconductor components (JEITA, JEDEC, etc.)
- Experience leading cross-functional test engineering, device integration, or REL/QUAL projects
- Experienced in programming languages and algorithms such as Python
Preferred Qualifications
- Ph.D. or M.S. in Electrical Engineering, Materials Science, Physics, or Analytics
- 10–20+ years of industrial experience in hardware engineering, with a proven history of leading successful NPI programs at major technology companies
- Experience with III-V material physics, especially LEDs and microLEDs
- Expertise in advanced semiconductor packaging technologies such as CoWoS, wafer reconstitution, InFO, or Hybrid Bonding
- Experience applying Machine Learning algorithms to hardware performance and reliability data
- Proficient in data analysis and reporting tools such as JMP or R
- Experience building and maintaining automated data pipelines and visualization dashboards (Grafana, Tableau)
- Experience in yield analysis, process optimization, or failure analysis for display products
- ATE Test Engineering experience
$173,000/year to $245,000/year + bonus + equity + benefits
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