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Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 2 years of experience working in firmware and embedded systems development.
- 2 years of experience with Real-Time Operating System (RTOS) environments (e.g., FreeRTOS, Zephyr) or bare-metal execution models.
Preferred qualifications:
- Master's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
About the job:
Artificial intelligence will be one of humanity’s most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority.We are pushing the boundaries across multiple domains. Our global teams offer various learning opportunities and career pathways for those driven to achieve exceptional results through collective effort.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $132000 - $189000 (USD) + 15% bonus target + equity + benefits.
Learn more about benefits at Google.
Responsibilities:
- Architect unified low-level communications and sensor integration strategies, establishing bus interface standards (SPI, I2C, UART, CAN-FD) across multi-modal sensor and actuator nodes.
- Lead high-speed onboard embedded networking design, including Ethernet switches, PHYs, MACs, and Linux DSA ensuring deterministic traffic flow and low-latency throughput between microcontrollers and compute modules.
- Drive real-time signal processing and filtering algorithms on resource-constrained targets to maximize sensor data fidelity before high-frequency control loops.
- Bridge Electrical and Systems teams by guiding component selection, bus topology, power sequencing, and signal integrity for seamless hardware bring-up.
- Establish hardware-in-the-loop (HIL) testing, deterministic safety mechanisms, and real-time diagnostic pipelines to rigorously validate firmware performance under harsh conditions.
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