Back to search
Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Review SoC/IP/Subsystem specifications for system-on-chip(S0C), IP blocks, and subsystems to understand design requirements and expected functionality. Develop and maintain comprehensive test plans and coverage plans to ensure complete verification of hardware components. Write and execute simulation-based verification tests using hardware description and verification languages such as System Verilog. Collaborate closely with design and micro-architecture teams to clarify functionality, review new features, and align on test coverage goals. Debug simulation failures by analyzing waveforms, error logs, and internal signals to identify the root cause and assist in resolution. Track verification progress using internal project management tools, ensure all milestones are met, and test coverage metrics are updated regularly. Participate in recurring meetings and technical reviews to communicate progress, discuss challenges, and aligning tasks with team priorities Document test methodologies, debugging procedures, and verifying results to contribute to team knowledge and supporting ongoing development. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $155,896 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Minimum Qualifications
Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or related field and 3 years of experience in the job offered or related occupation. 3 years of experience in the following skills are required: Utilizing System Verilog for constrained random verification and functional coverage. Utilizing UVM to develop verification environments and implement directed and random test cases. Utilizing C and C++ to develop Verification IP including reference models and checkers. Utilizing Python and Perl for creating automation tools, constraint generation, and regression analysis. Utilizing EDA tools for testbench simulations, debugging, and coverage closure. Utilizing High-speed interface protocols for verifying high bandwidth, low power data communication systems. Education and/or experience must include: Utilizing Digital Design for understanding ASIC design flows and verification. Utilizing Computer Architecture for exploration of memory subsystem and architecture trade-off analysis.
Preferred Qualifications
N/A
Learn more about this Employer on their Career Site
