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Design Verification Engineer

Apple
Posted 5 days ago, valid for 24 days
Location

Cupertino, CA, US

Salary

$129,300 - $194,700 per year

Contract type

Full Time

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Sonic Summary

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  • Apple Inc. is seeking candidates for a verification engineer position in Cupertino, California, requiring a minimum of a Bachelor's degree in Electrical Engineering or a related field.
  • Applicants should have experience in digital logic design, computer architecture, and CPU microarchitecture, with skills in C++ and Verilog for testbench and test plan development.
  • The role involves verifying design functionality, developing test plans, and utilizing hardware debugging tools, with a focus on ensuring comprehensive coverage of test cases.
  • The base pay for this position ranges from $129,300 to $194,700 per year, depending on skills, qualifications, and experience.
  • Additionally, Apple offers a range of benefits including medical coverage, retirement plans, and opportunities for stock participation.
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description


APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work closely with architecture and RTL designers on verifying the functionality correctness of the design. Develop and lead test plan and test environments. Develop complex tests in assembly, C, or vectors according to test plans. Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered. Develop checkers or C-base transactor to verify the design. Extend and maintain SystemVerilog/UVM testbenches. Monitor large-scale gate-level or RTL regressions. Inspect waveforms in Verdi or other hardware debugging tools. Write Python/ Perl utilities to scrub and aggregate regression data. Author and review detailed verification plans and coverage dashboards. Sync with cross-functional partners-architecture, validation, and firmware teams. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 - $194,700/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications


Bachelor’s degree or foreign equivalent in Electrical Engineering and Computer Science, Computer Science, Electrical Engineering, Electronics Engineering, or a related field. Experience and/or education must include: Utilizing digital logic design, computer architecture, and CPU microarchitecture concepts to verify CPU design. Utilizing C++ and Verilog for testbench and test plan development. Utilizing Verilog skills for assertion-based verification techniques. Utilizing Verdi waveforms to debug functional issues in RTL, providing complete root cause analysis. Developing random generators for stimulus to verify CPU microarchitecture features. Hardware debugging and validation to identify, analyze, and resolve complex issues between components. Providing verification of complex control logic structures to ensure the functionality correctness of the design. Understanding computer architecture and CPU microarchitecture.

Preferred Qualifications


N/A



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