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Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Develop Microarchitecture and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification. Develop, assess and refine RTL design to target power, performance, area and timing goals. Support test bench development and simulation for functional and performance verification. Explore high performance strategies and validate that the RTL design meets targeted performance. Work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $156,853 - $213,700/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Minimum Qualifications
Master's Degree or foreign equivalent in Computer Engineering, Electrical Engineering, or related field. Experience and/or Education must include the following skills: Verilog and SystemVerilog to implement custom models in RTL Knowledge of simulators (such as VCS) and waveform debugging tools (such as Verdi) Knowledge of custom circuit schematics Knowledge of special modeling modes such as power-aware and X/Z modeling in the designs Scripting in languages such as Perl or Python Knowledge of logic design, including combinational and state machine design Knowledge of CMOS design, SRAMs and memory modeling
Preferred Qualifications
N/A
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