Description
- Display panel architecture scoping and definition -Â Display pixel and panel design, layout and parasitic parameter extraction - Display pixel and panel modeling, characterization, and validation -Â Failure mode analysis, root cause investigation, and problem solving for mass-production display development - Integration of new transistor technologies into display panel circuits - Contribute to the development of custom AI-assisted tools for circuit and layout analysis - Collaboration with EE/Silicon teams for definition of signal interfaces and new compensation blocks required to drive display panel - Collaboration with Touch teams to design touch sensors and model/analyze touch-display coexistence -Collaborate with Sensing teams for integration of sensors behind display panels - Collaboration with Mechanical Engineering/Product Design teams on panel peripheral circuit and border design for narrow-border display technology - Collaboration with external vendors for display manufacturing - International business travel to support project implementation
Minimum Qualifications
Bachelors's degree Strong command of Electrical Engineering circuit design fundamentals (analog and digital) Experience with Cadence/Virtuoso modeling and simulation Excellent written and verbal communication skills
Preferred Qualifications
Experience in technical knowledge of displays or related electronics Experience in display pixel, gate driver designs Understanding of Thin-Film Transistors (TFTs) and display panel process Experience in characterizing electrical performance of electrical circuits Experience in integrating AI and AI agents in circuit design/analysis workflows
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