ASIC Verification Engineer

This is a core Engineering Role

 ok to take candidate anywhere in the USA who can work in EST time zone

Candidate might be asked to travel to Paris every quarter for 1 week based on need of client need

It will be nice if Candidate knows French language

Duration -12 months

Rate – we are open and flexible for right candidate

Core responsibilities:

Should have experience in CortexA9 -newer version of cortex is preferred.

Should have experience in SoCs based on both Cortex‑A and Cortex‑M families.

Experience in Cortex‑A9 experience includes multi‑core MMU‑based systems, shared L2 and private L1 cache hierarchies, cache coherency validation, AXI/APB interconnects, DMA, interrupts, power states, and CoreSight/JTAG‑based debug, all implemented in full UVM environments using golden‑model–driven tests and ARM VIP for stress traffic.

Experience in Cortex‑M4 and Cortex‑M55–based SoCs, focusing on low‑power architectures, independent cores, measurement flows, and power management.

strong end‑to‑end view from ultra‑low‑power microcontroller designs to high‑performance application processors.

Assure the overall quality of our designs, which contribute to exciting launches of wireless portable hardware at Snap

A strong focus on ARM IPs (cpu (cortex-a v9 arch), gpu (mali), debug (css600, coresight), etc.) where your knowledge and experience will allow us to review architectural/design decisions and ramp up on verification of these blocks

Serve as an individual contributor to own and develop the verification of our core IP blocks

Ownership throughout the whole project lifecycle, e.g.: Specification reviews, Verification plans, test case development, UVM environments, Coverage (analysis), Debugging, GLS, etc.

Work closely with other teams to gather relevant information and share your knowledge about the design to further improve requirements and specifications. As well as providing vital feedback in their debugging efforts

Collaborate with the global verification team to improve our processes and launch initiatives to improve the overall quality of the design as well as the way of working to become the best in class verification team

Knowledge, Skills and Abilities:

Proven (5+ years) hands-on experience with state-of-the-art verification methodologies and processes, such as UVM / SystemVerilog, Formal verification, Constraint-random verification, Assertions, Coverage metrics, Coverage analysis, Gate Level Simulation, Key Performance Indicators testing, etc.

Strong understanding of ARM related IPs is required: cpu (cortex-a v9 arch), gpu (mali), debug (css600, coresight), etc.

Hands-on experience with designing and implementing C based test-cases to configure and test the ARM IPs as well as the ability to re-use the manufacturer provided test benches