Senior Staff Hardware Engineer – Board Design / Package Design

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

What You Can Expect

As a Senior Staff Hardware Design Engineer, you will be:

• Responsible for high-performance hardware/system design of all-optical 400G/800G per lambda coherent DSP reference designs and evaluation platforms including power, control, clocking, high-speed I/O, and form factor.
• Architect, simulate and test the industry's best signal integrity with bandwidths exceeding 110GHz.
• Design and simulate for power integrity critical high power coherent DSPs
• Collaborate with system, analog, digital, firmware, DFT, FA, validation, applications, etc. teams to define evaluation platform requirements.
• Work with fellow hardware engineer(s) and firmware team for initial board bring-up.
• Perform FA on boards and identify necessary repairs.
• Develop and execute individual board validation plans and generate detailed validation reports.
• Work with external PCB fabrication and assembly houses to ensure manufacturable designs and timely delivery of boards.

What We're Looking For

• Bachelor’s Degree in Electronic Engineering with at least 5 years of experience in high-speed board-level hardware design.
• Experience in power, analog, clocking, FPGA, µProcessor, µController, memory, ethernet, SERDES, PAM4, or similar disciplines.
• Experience in schematic design and library management using OrCAD CIS/CIP, Altium, or equivalent.
• Experience in high-frequency signal integrity simulations using Ansys HFSS, Siwave, and ADS or equivalent and measurements using VNA and TDR scopes.
• Experience in analog and power design using PSPICE or equivalent.
• Experience working with board manufacturers and layout engineers to define placement, stack-up, design rules, etc.
• Experience in bring-up, test, characterization, and failure analysis (FA) of new boards using multi-meters (DMM), oscilloscopes, logic analyzers, etc.
   

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.