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Description
As a SoC Integration Engineer, you will have responsibilities to design and integrate IPs. • Working with other specialists that are members of the SoC Design, SoC Design Verification, System Verification, STA, and Physical Design teams to implement designs/flows for sophisticated SoCs. • Integrating various IPs and ensuring design meets DFT (design-for-test), CDC (clock domain crossing), Synthesis/Static Timing and Power Requirements. • Developing micro-architecture and design specifications. • Work closely with physical design, DFT, and CAD teams to optimize performance, power, and area (PPA) targets while ensuring design quality and maintainability and improve front-end design methodologies. • Implementing and verifying sophisticated logic designs. • Collaborate cross-functionally to ensure successful SoC integration, supporting design verification and validation across all phases; from concept to silicon bring-up.
Minimum Qualifications
BS and 10+ years of relevant industry experience. Solid understanding of digital logic design and RTL development (SystemVerilog, Verilog). Knowledge of low-power design techniques and power optimization strategies. Attention to Detail: Meticulous attention to detail and a commitment to delivering high-quality designs. Knowledge of ASIC tool flows: lint, synthesis, CDC, RDC, DFT, STA.
Preferred Qualifications
Familiarity with SoC design flows and tools (e.g., Synopsys, Cadence). Experience with bus protocols (AXI, AHB, APB) and interface standards (PCIe, USB, DDR, SPI, SPMI, I2C, I3C, etc.). Decent scripting skills (Python, Perl, TCL, Shell) for automation. Good debugging and problem-solving skills. Excellent communication and cross-functional collaboration.
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