Description
You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA). You will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modeling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.
Minimum Qualifications
Minimum requirement of a bachelors degree.
Preferred Qualifications
Deep understanding of analog mixed-signal design with experience in high-speed serial links. Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques Good grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops) Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts Knowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64+ Gbps NRZ and PAM applications Knowledge of CDR architectures and implementations Knowledge of lab equipment and testing Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS) Hands-on experience in advanced CMOS technologies, design with FinFet technology Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime) Experience in lab testing of high-speed serial I/O, debug and data analysis techniques Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) Skills in scripting and automation to enhance efficiency are highly desirable
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