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ASIC Physical Design Engineer

Jane Street
Posted 12 days ago, valid for 19 days
Location

New York, NY 10008, US

Salary

$250,000 - $300,000 per year

Contract type

Full Time

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Sonic Summary

info
  • We are seeking an ASIC Physical Design Engineer to join our Ultra Low Latency team, focusing on advanced hardware design, testing, and deployment.
  • The ideal candidate should have experience in physical design flows and be able to manage the PD process from start to finish, while also having a background in RTL design.
  • This role requires a collaborative mindset and the ability to think like a chip designer, rather than just a traditional PD engineer.
  • Candidates should have programming experience in a high-level language and be open to leveraging software engineering techniques to enhance hardware design.
  • The position offers a competitive salary, and we are looking for individuals with at least 5 years of relevant experience.

About the position

We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking, and research infrastructure.

This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to lead with physical design expertise but think like chip designers. You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and reason about design decisions that cross the front-end/back-end boundary. 

If you've spent your career exclusively in PD, this probably isn't the right fit— but if you've worked across the stack, either because you started as an RTL designer and moved into PD, or because you were on a smaller team where you had to wear multiple hats, we'd love to talk.

We're big believers in the ability of tools to improve the productivity, reliability, and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About you

  • You have hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis)
  • You don't need to have optimized every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are
  • Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementation—and vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist
  • You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.)

If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.




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By applying, a Jane Street account will be created for you. Jane Street's Privacy Policy and Terms & Conditions will apply.

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