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Responsibilities
- Define and own the compiler architecture and technical roadmap for MTIA, including graph compilers, code generation, and optimization strategies
- Solve complex compiler optimization challenges spanning operator fusion, memory planning, scheduling, and efficient mapping of ML workloads to custom accelerator hardware
- Design extensible compiler frameworks and intermediate representations that enable rapid iteration and support evolving ML model architectures
- Drive performance improvements by identifying and eliminating bottlenecks across the compiler stack, from high-level graph optimizations to low-level code generation
- Partner with MTIA hardware teams on hardware-software co-design, influencing accelerator architecture decisions based on compiler capabilities and workload requirements
- Establish compiler correctness, reliability, and performance validation practices that ensure production-quality code generation at scale
- Collaborate with ML framework teams to ensure seamless integration of MTIA compiler infrastructure with PyTorch and other ML frameworks
- Evaluate and integrate state-of-the-art compiler technologies such as MLIR, and drive adoption of best practices across the compiler organization
- Mentor engineers across the organization, leading compiler architecture reviews and establishing a culture of technical excellence in compiler development
- Communicate complex compiler architecture and strategy clearly to technical and non-technical audiences, producing reference-quality design documents
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 12+ years of experience in software engineering with deep specialization in compiler development, code generation, or performance optimization for accelerators
- Experience architecting production compiler infrastructure for ML accelerators, GPUs, or custom silicon
- Experience with compiler intermediate representations, optimization passes, and code generation techniques
- Experience leading multi-year cross-functional technical initiatives, including defining metrics, managing dependencies, and driving execution across organizational boundaries
- Experience developing high-performance systems software in C++ with strong understanding of low-level optimization and hardware architecture
- Experience influencing technical direction and engineering practices across multiple teams through written proposals, design reviews, and stakeholder alignment
Preferred Qualifications
- Experience with hardware-software co-design for custom ML accelerators or AI chips
- Track record of applying AI tools and automation to redesign engineering workflows, with demonstrated efficiency or quality improvements
- Master's or PhD degree in Computer Science, Computer Engineering, or a related technical field
- Experience with graph-level optimizations, operator fusion, memory planning, and scheduling for ML workloads
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Experience contributing to compiler or ML systems efforts through publications, open-source projects, or standards bodies
- Experience defining and operationalizing performance benchmarks and correctness validation for compiler infrastructure
- Deep understanding of ML model architectures (transformers, CNNs, etc.) and their computational patterns
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- Experience with ML compiler stacks such as MLIR, XLA, TVM, Glow, or similar frameworks
$219,000/year to $301,000/year + bonus + equity + benefits
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