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SoC Architect

TYLsemi
Posted 3 months ago, valid for 22 days
Location

San Jose, Santa Clara 95103, CA

Salary

$175,000 - $350,000 per year

Contract type

Full Time

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Sonic Summary

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  • We are looking for a SoC Architect to lead the architecture of next-generation XPUs for AI Infrastructure, requiring 18+ years of experience in SoC or system architecture.
  • The role involves defining system architecture for complex SoCs, focusing on scalability, performance, and optimization across various subsystems like compute, memory, and IO interfaces.
  • Candidates should possess a deep understanding of system-level design, high-speed IO protocols, and performance modeling, along with strong collaboration skills.
  • Preferred qualifications include experience with memory architectures, chiplet architectures, and power/performance optimization at the system level.
  • The position offers a competitive salary, reflecting the seniority and expertise required for this critical role in driving architectural innovation.

Role Overview 

We are seeking a SoC Architect to define and drive the architecture of next-generation infrastructure. This role involves end-to-end ownership of system and SoC architecture, from concept to silicon, with a strong emphasis on scalability, performance, interconnects, and system-level optimization

 

Key Responsibilities 

  • Define system architecture for complex SoCs, including IO, compute, interconnect and subsystems  
  • Drive architecture for scalable and modular designs, including chiplet-based systems (UCIe)  
  • Architect high-performance data movement across IO interfaces  ( PCIe / UCIe / CXL / UALink / ESUN )
  • Collaborate with design and DV teams to ensure architectural feasibility and efficient implementation  
  • Develop performance models and simulations to validate architecture choices  
  • Drive trade-offs across:  Performance, Power, Area and Cost 
  • Work closely with customers and software teams to align architecture with real-world workloads  
  • Influence long-term roadmap and technology direction  
  • Define system-level verification and validation strategies  

 

Required Qualifications 

  • Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Engineering, or related field  
  • 18+ years of experience in SoC or system architecture  
  • Proven track record of architecting complex SoCs for AI, HPC, or Networking  
  • Deep understanding of:  
    • System-level design and trade-offs  
    • High-speed IO protocols (UCIe, PCIe, Ethernet)  
    • Data movement and interconnect design  
    • Experience with performance modeling and architectural simulation  
  • Strong cross-functional collaboration skills  

 

Preferred Qualifications

  • Knowledge of coherency protocols (CXL, CHI.)  
  • Experience with power/performance optimization at system level  
  • Exposure to software-hardware co-design  
  • Experience with memory architectures (DDR, HBM, cache hierarchies)  
  • Familiarity with chiplet architectures and advanced packaging (2.5D/3D)  

 

Key Attributes 

  • Strong system-level thinking and architectural vision  
  • Ability to balance innovation with practical execution  
  • High ownership and accountability  
  • Strong communication and leadership skills  

 

Success Metrics 

  • Scalable and efficient SoC architectures across multiple generations  
  • Achievement of performance, power, and cost targets  
  • Strong alignment between architecture and silicon outcomes  
  • Reduced architectural rework through early validation 





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