Job Details:
Job Description:
Altera is looking for a Principal HW-SW Co-Architect to define and drive the development of highly optimized firmware, and FPGA solutions. This role requires a deep technical expert with hands-on experience across firmware, RTOS, and HW/SW co-design. The successful candidate will work closely with fellow architects, designers, and engineers to push the boundaries of system performance, efficiency, and reliability.
This position is ideal for an engineering technical leader who thrives in hands-on technical problem solving, brings decades of embedded expertise, and enjoys collaborating across HW, FW and SW organizations to deliver complex system-level solutions.
Other responsibilities include but are not limited to:
Architects and develops embedded software within environments that have constrained resources such as memory, interrupts, and processing power.
Makes architectural decisions with a focus on software structure, interfaces, frameworks, protocols, algorithms, and/or validation direction.
Often requires definition of complex software structures, algorithms, and/or design patterns for the purposes of interaction with Firmware.
Often performs and leads pathfinding activities and explores future technologies.
As a principal engineer, recognized as a domain expert who influences and drives technical direction across Intel and industry.
Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values.
Aligns organizational goals with technical vision, formulates technical strategy to deliver leadership solutions, and demonstrates a track record of relentless execution in bringing products and technologies to market.
Salary RangeÂ
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The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. Â
$200.4K - $290.1K USDÂ
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We use artificial intelligence to screen, assess, or select applicants for the position.Â
Qualifications:
Master’s Degree in Computer Engineering, Electrical Engineering, or related discipline with 15+ years of experience or Bachelor’s Degree in related discipline with 20+ years of experience in software, firmware, and SoC/FPGA systems development.
Deep expertise in bare-metal development and driver-level programming.
Proven record of HW/SW co-design, performance modeling, and optimizations.
Strong proficiency in C/C++, assembly, and debugging tools.
Demonstrated success in system-level debug.
Job Type:
RegularShift:
Shift 1 (United States of America)Primary Location:
San Jose, California, United StatesAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Learn more about this Employer on their Career Site
