Back to search
Description
In this role, you will drive the definition, development, and qualification of next-generation memory packages critical to Apple’s future products. You will guide the package roadmaps of our memory partners and collaborate with internal engineering teams to enable bandwidth and density scaling. Your ownership will span the entire product lifecycle, from initial concept through qualification.
Minimum Qualifications
Minimum requirement of a bachelor's degree in a relevant field
Preferred Qualifications
MS or PhD preferred, with 3+ years of industry experience in package design and assembly process development of high-bandwidth and high-density memory packages. Strong knowledge of thin-die stacking technologies including wirebond, flip-chip, and wafer/die bonding. Strong knowledge of packaging materials and design to engineer warpage and CTE properties and mitigate thermal challenges. Solid working experience in package test and reliability, system-level downstream process interaction, and packaging inspection metrology. Deep understanding of SI/PI co-design with memory die and high-speed DDR or differential signaling. Understanding of how memory die floorplan and architecture influence package structure and routing, with experience collaborating with memory die design teams. Excellent communication skills for collaborating with internal teams and managing external vendors.
Learn more about this Employer on their Career Site
