Reality Labs (RL) focuses on delivering Meta's vision through AI-first wearables such as AI Smart Glasses and Augmented Reality (AR) Glasses. The compute performance and power efficiency requirements of wearables requires custom silicon. The Reality Labs Silicon team is driving the state-of-the-art forward with highly integrated SoCs that leverage breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable wearables that blend our real and virtual worlds throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. We are looking for a Silicon Architect who will collaborate with a world-class group of SoC and IP architects, modeling, development, and validation teams, firmware developers, and program managers to accelerate the development and market introduction of low power highly customized SoCs. As a member of the Reality Labs SoC Performance team, you will play a key role in leading performance modeling, correlation, workload profiling, and analysis efforts.

Responsibilities

Conduct thorough bottleneck analysis of existing and future SoCs to identify areas for improvement
Develop accurate models of IP components, SoC fabric, and DRAM to predict performance and inform design decisions
Analyze system usage behavior of workloads and create micro-benchmarks to evaluate performance
Identify opportunities for optimization and collaborate with hardware teams to solidify HW-SW co-design
Work across disciplines, collaborate with vendors, brainstorm ideas and solutions, develop new methodologies, and coordinate multiple initiatives

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6+ years of experience in creating performance models using C/C++ or SystemC
Experience with SoC architecture, NoCs, memory sub-system, Quality of Service (QoS), and heterogeneous compute principles
Experience with scripting, infrastructure, automation and visualization using Python
Experience with power concepts and trade-offs
Experience deconstructing technical problems, designing performance experiments, analyzing/visualizing data, and sharing detailed analysis in the from of documentation with peers and cross functional partners

Preferred Qualifications

MS degree in EE/CS or equivalent experience
Experience working with cycle-accurate performance models and frameworks for performance architecture evaluations of various SoC components (Accelerators, NoC, DRAM, MMU, etc.)
Experience with bare-metal programming, micro-benchmarking, performance instrumentation, Simpoints, etc
Experience with RTL design verification

$146,000/year to $209,000/year + bonus + equity + benefits

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Silicon Performance Architect