Responsibilities
- Assist in the development, execution, and sign-off of SoC and end-to-end system validation plans
- Identify and communicate technical risks related to the project to the stakeholders under guidance
- Participate in silicon bring-up and validation activities
- Understand system HW/SW/FW components as a whole and assist in driving test execution and debug with cross functional/PnP teams
- Collaborate with the team for lab debug, silicon bug repro, failure analysis, and failure report activities
- Work with cross-functional teams (i.e., architecture, IP, FW, EE, SoC, and product engineer teams) to generate validation reports for SoC and systems
- Adapt to changing roadmaps and validation plans based on changes in an agile environment
Minimum Qualifications
- Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
- 2+ years of hands-on experience in bring-up, debug, and validation of complex SoCs
- 1+ years of experience in high-speed protocols (i.e., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up
- 1+ years of experience in silicon validation planning, execution, validation FW development, and validation sign-off
- 1+ years of experience using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc
- Experience with building silicon validation infrastructure and test automation, in highly cross-functional environments - across multiple team sites
Preferred Qualifications
- Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process
- Knowledge and experience in pre-silicon validation platforms (i.e., FPGA and emulation)
- 1+ years of experience working in a cross functional and cross site team environment
- Experience with building silicon validation infrastructure and test automation
$114,000/year to $172,000/year + bonus + equity + benefits
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