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Responsibilities
- Responsible for System on Chip and end-to-end system validation plan development, execution and sign-off
- Identify and communicate technical risks related to the project to the stakeholders
- Plan, organize, and participate in silicon bring-up and validation activities across multiple Systems on Chips
- Understand system Hardware, Software, Firmware component as a whole and drives test execution and debug with cross functional/PnP teams
- Collaborate with the team for lab debug, silicon bug repro, failure analysis, and failure report activities
- Work with cross-functional teams (i.e., architecture, Intellectual Property, Firmware, Electrical Engineering, System on Chip, and product engineer teams) to generate validation reports for SoC and systems
- Work in an agile environment, adapt to changing roadmaps, and adjust validation plans based on evolving requirements
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of hands-on experience in bring-up, debug, and validation of complex Systems on Chips
- 2+ years of experience in high-speed protocols (i.e., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up
- 2+ years of experience in silicon validation planning, execution, validation Firmware development, and validation sign-off
- 2+ years of experience using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc
- Experience building silicon validation infrastructure and test automation in cross-functional environments across multiple team sites
- Experience influencing design, Design Verification and post-silicon validation teams to optimize the usage of pre-silicon prototype platforms
Preferred Qualifications
- Experience with building silicon validation infrastructure and test automation
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Knowledge of ASIC design flow, silicon foundry test flow, and silicon Firmware development process
- Knowledge and experience in pre-silicon validation platforms (i.e., FPGA and emulation)
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- 2+ years of experience working in a cross functional and cross site team environment
$146,000/year to $209,000/year + bonus + equity + benefits
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