Responsibilities
- Develop and maintain low-level validation firmware in C/C++ targeting custom ASICs across emulation, FPGA, and silicon platforms
- Lead pre-silicon and post-silicon validation efforts by authoring and executing firmware-driven test plans covering CPU subsystems, memory controllers, cache hierarchies, and high-speed interfaces
- Bring up and debug complex SoC interfaces including PCIe, DDR, USB, and proprietary interconnects on emulation platforms and physical silicon
- Build and maintain firmware infrastructure including bootloaders, hardware abstraction layers, and register-level drivers to support validation and characterization workflows
- Collaborate with RTL design, architecture, and physical design teams to identify and root-cause silicon bugs, correlating pre-silicon simulation results with post-silicon behavior
- Define and drive firmware validation methodology improvements that reduce bring-up cycle time and improve coverage across silicon generations
- Develop automated test to enable continuous validation across emulation, FPGA prototyping, and silicon bring-up environments
- Partner with hardware and software teams to support hardware-software co-design decisions and ensure firmware readiness at each silicon milestone
- Contribute to silicon readiness reviews by documenting validation coverage, known issues, and risk assessments for key subsystems
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of experience developing validation firmware or embedded software for custom ASICs in C/C++
- 3+ years of experience with pre-silicon and post-silicon debug using tools such as Lauterbach, JTAG-based debuggers, or equivalent on physical silicon or FPGA platforms
- Experience with EDA tools and scripting languages used to build tools and flows for complex emulation environments
- Experience developing hardware abstraction layers, bootloaders, or low-level drivers for custom silicon platforms
Preferred Qualifications
- Experience with SoC architecture including CPU cores, memory subsystems, cache hierarchies, and on-chip interconnects
- Experience enabling validation across multiple pre-silicon environments including emulation and FPGA prototyping alongside physical silicon bring-up
- Familiarity with hardware-software co-design workflows and contributing to architecture or microarchitecture decisions from a firmware validation perspective
- Experience with machine learning or computer vision accelerator subsystems at the hardware-software integration level
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
$146,000/year to $209,000/year + bonus + equity + benefits
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