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F9 WLA Process Integration and Yield Engineering Manager

INTEL
Posted 6 days ago, valid for a year
Location

Edgewood, NM 87015, US

Salary

$120,000 - $160,000 per annum

info
Contract type

Full Time

By applying, a Intel account will be created for you. Intel's Privacy Policy will apply.

Sonic Summary

info
  • Salary: Not specified
  • Years of Experience Required: 5+ years of Semiconductor fabrication (or packaging) experience
  • Location: New Mexico
  • Job Title: Process Integration and Yield Engineering Manager
  • Qualifications:
    • Bachelor's degree in an Engineering or Physics, Electrical Engineering, or a related field of study with 6+ years of experience
    • Master's degree in an Engineering or Physics, Electrical Engineering or a related field of study with 4+ years of experience
    • PhD degree in an Engineering or Physics, Electrical Engineering or a related field of study with 2+ years of experience
    • 2+ years of collaboration experience with defect inspection, failure analysis, integration, and module engineering
    • 2+ years of experience with statistical analysis tools such as JMP

Job Description


Are you interested in being part of Intel's strategy to advance Moore's law for the next 50 years? Are you passionate about not only your own personal growth, but growing and transforming teams and organizations? Then The New Mexico Disaggregation Manufacturing Organization (NM DMO) is the place for you.

The New Mexico Disaggregation Manufacturing Organization (NM DMO) is in the midst of exciting growth and transformation. As the needs for the worlds compute capabilities have evolved and grown, advanced packaging has become a critical part of the semiconductor industry roadmap. NM DMO brings Advanced Packaging and Foveros HVM (High Volume Manufacturing) to life under a single organization with all segments of the process co-located at a single campus for the first time.
As part of our growth, we are looking for amazing talent with experience in HVM and foundry, and servicing customers both at a local and global level. Join us and help us create the next generation of technologies that will shape the future for decades to come.

As a Process Integration and Yield Engineering Manager, you will manage a team of Wafer Level Assembly (WLA) process integration/yield engineers who drive yield, defect, and quality improvement activities to meet targets. The Process Integration and Yield Engineering Manager is responsible, but not limited to:

  • Proactively identifying risk and opportunity, based on in depth understanding of process flow, product architecture, process interactions, process equipment and effective research of industry literature.
  • Overseeing the local change control process and review board.
  • Leading a team which is capable of effectively triangulating process flow, electrical/test information, and physical FA to form complete physical models and risk assessments across technologies.
  • Responding urgently to factory excursions, determining root cause, and implementing solutions which address the underlying sources of the problem and proactively applying the solution to other modules.
  • Oversees excursion management processes and exhibits leadership amidst complex and impactful material review boards.
  • Working with internal and external customers to identify, assess, and mitigate quality risks.
  • Understanding new technologies and novel foundry yield characterization techniques as needed.
  • Supporting technical interactions with internal and external customers.
  • Partnering with Technology Development (TD) team to design and transfer robust technologies to HVM.
  • Generating and driving critical program and technology roadmaps to ensure world class cost and quality products.

The ideal candidate should exhibit the following behavioral traits:

  • Strong technical and troubleshooting skills.
  • Strong verbal and written communication skills.
  • Demonstrated capability working in a high performing team culture which includes excellent teamwork and leadership skills, demonstrated problem solving and prioritization skills.
  • Willingness of being both collaborative and critical.
  • Willingness presenting information clearly and effectively to multiple audiences with varying degrees of technical background.
  • Willingness working autonomously with minimal oversight or coaching.

Relocation assistance provided.


Qualifications


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess at least one of the following 3 degrees; plus, the years of experience required for each degree in the areas specified below:

  • Bachelor's degree in an Engineering or Physics, Electrical Engineering, or a related field of study with 6+ years of experience.
  • Master's degree in an Engineering or Physics, Electrical Engineering or a related field of study with 4+ years of experience.
  • PhD degree in an Engineering or Physics, Electrical Engineering or a related field of study with 2+ years of experience
  • 5+ years of Semiconductor fabrication (or packaging) experience.
  • 2+ years of collaboration experience with defect inspection, failure analysis, integration, and module engineering.
  • 2+ years of experience with statistical analysis tools such as JMP.2+ years of experience interpreting product data including inline parametrics, defect and SORT data, finding failure root cause and inline indicator and driving for solutions.


Preferred Qualifications:

  • 3+ years management experience.
  • Experience in new semiconductor technology development.
  • Experience in data analysis and statistical process control (JMP, SQL, PCS)
  • Fundamental understanding of semiconductor process flow.
  • Understands concepts of process capability, true spec, and variance.
  • Demonstrated leadership experience in factory level projects and executing projects in a timely manner.
  • Knowledge on inline inspection method, electrical test structures and SORT programs.

Inside this Business Group


As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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By applying, a Intel account will be created for you. Intel's Privacy Policy will apply.